CMOS RF Circuits for Wireless Applications

Advanced concepts for wireless communications present a vision of technology that is embedded in our surroundings and practically invisible, but present whenever required. From established radio techniques like GSM, 802.11, or Blue-tooth to more emerging like ultra-wideband (UWB) or smart dust moats, a common denominator for future progress is the underlying CMOS technology. Although the use of deep-submicron CMOS processes allows for an unprecedented degree of scaling in digital circuitry, it complicates implementation and the integration of traditional RF circuits. The explosive growth of standard cellular radios and radically different new wireless applications makes it imperative to find architectural and circuit solutions to these design problems. This special EURASIP issue contains carefully selected 12 papers that represent state-of-the-art CMOS designs for wireless applications. The first group of three papers from the University of Alberta discusses various system aspects in the context of CMOS implementation. Cabric et al. propose novel radio architectures that might be used at 60 GHz and for cognitive radios. Leenaerts presents one of the first CMOS circuit implementations of the ultra-wideband (UWB) technology. Howard et al. delineate conditions under which error control coding (ECC) is efficient from an energy point of view in wireless sensor networks (WSNs). While it is true that heterogeneous circuits and architec-tures originally developed for their native technologies cannot be effectively integrated " as is " into highly scaled CMOS processes, one might ask the question whether those functions can be ported into more CMOS-friendly architectures to reap all the benefits of the digital design and flow. It is not predestined that RF wireless frequency synthesizers be always charge-pump-based PLLs with VCOs, RF transmit up-converters be I/Q modulators, receivers use only Gilbert cell or passive continuous-time mixers. Performance of modern CMOS transistors is nowadays good enough for multi-GHz RF applications. The following four papers from Texas Instruments, Car-leton University, and Silicon Labs describe the RF CMOS circuit design challenges. Ho et al. present a key component of RF direct processing—the RF sampling mixer. The circuit is used in Bluetooth and GSM applications. Koh et al. propose a novel sigma-delta ADC with embedded decimation and gain control. The remaining two papers in that group address challenges of phase-locked loop (PLL) design for RF applications. Rogers et al. provide a tutorial on phase noise model-ing for fractional PLLs, while Maxim presents solutions for effective power supply filtering and their effects on PLL performance. Low power …